A Low Power Design Method for Synchronous TP RAM
نویسندگان
چکیده
منابع مشابه
design of an analog ram (aram)chip with 10-bit resolution and low-power for signal processing in 0/5m cmos process
برای پردازش سیگنال آنالوگ در شبکه های عصبی ، معمولا نیاز به یک واحد حافظه آنالوگ احساس میشود که بدون احتیاج به a/d وd/a بتواند بطور قابل انعطاف و مطمئن اطلاعات آنالوگ را در خود ذخیره کند. این واحد حافظه باید دارای دقت کافی ، سرعت بالا ، توان تلفاتی کم و سایز کوچک باشد و همچنین اطلاعات را برای زمان کافی در خود نگهدارد. برای پیاده سازی سیستمی که همه این قابلیتها را در خود داشته باشد، کوشش...
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To date all the proposals for low power designs of RAMs essentially focus on circuit level solutions. What we propose here is a novel architecture (high) level solution. Our methodology provides a systematic tradeoff between power and area. Also, it allows tradeoff between test time and power consumed in test mode. Significantly, too, the proposed design has the potential to achieve performance...
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ژورنال
عنوان ژورنال: Open Journal of Circuits and Systems
سال: 2017
ISSN: 2327-0853,2327-0861
DOI: 10.12677/ojcs.2017.62005